FFT Processor Design for OFDM Systems

• Main Authors: Kun-Lung Chen, 陳坤隆
• Other Authors: Sau-Gee Chen
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/45s669

碩士 === 國立交通大學 === 電子工程系所 === 92 === In order to design a low-complexity and low-cost variable-length FFT processor module suitable for various OFDM communication systems, the thesis first studies various design techniques from algorithm level to architecture level. Then the thesis proposes an improved variable-length data address generator, a new twiddle factor generator and a new CORDIC-based FFT PE based on a new CORDIC algorithm. The variable-length data address generator simplifies the original area-consuming barrel-shifter based designs with a few simpler multiplexer-based addressing functions. The twiddle factor generator has the merit of low complexity and high speed over the existing twiddle factor generators for practical FFT operations. A CORDIC-based FFT PE has the advantage that it does not need extra memory to store twiddle factors. The new CORDIC algorithm and its FFT PE design have lower iteration counts than the known CORDIC design. Finally, the thesis synthesizes a multi-standard variable-length CORDIC-based FFT processor, which is suited for 802.16a, DAB and DVB-T.