Investigations of Embedded-System Design Flow on SoPC Platform

• Main Authors: Cherng-Kuen Lin, 林承昆
• Other Authors: Jenq-Kuen Lee
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/50214948343819254158

碩士 === 國立清華大學 === 資訊工程學系 === 92 === Since Application Specific Integrated Circuit (ASIC) designs arrive, various application specific hardware modules were put upon ASICs including computation parts such as FFT, video codec and I/O unit like Network Interface Controller (NIC). With multi-million gate FPGA technology, the design paradigm transfers from ASIC toward FPGA. With the coming of broadband access, performance-demanding hardware-base functionality of cryptography, communication and multimedia were introducing into FPGA and ASIC design. SoPC stands for a system implemented on a FPGA which incorporates a General Purpose Processor (GPP) as well as one or more blocks of IP as well as the users code. A SoPC platform provides more flexibility compared to GPPs and less time consuming verification and instancing compared to ASICs. As many functions are launched on reprogrammable devices, the platform with an operating system generalizing the interface between hardware and software and handling the infrastructure will shorten the development time. Moreover, open source applications are available such as OpenSSL as general purpose cryptography library, Apache as HTTP Server, and Kaffe as Java virtual machine. The working on operating systems enhance the ability of devices and reduce the software development time. The Altera Excalibur EPXA10 with one million gates around an ARM922T processor core is chosen for investigation in our work. Large reprogrammable FPGA area provides us the opportunity to design and research more complicated application specific hardware modules. This thesis presents an architecture overview to a SoPC platform and an investigation of design flows on it.