A Parameterized In-loop Deblocking Filter IP for H.264 BP/MP Video Coding

• Main Authors: Ming-Chih Tsai, 蔡明志
• Other Authors: Jiun-In Guo
• Format: Others
• Language: zh-TW
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/90905793227718476134

碩士 === 國立中正大學 === 資訊工程所 === 93 === The demands on applications of multimedia video coding are getting widespread, such that the output image qualities after decoding are becoming higher. MPEG-4 AVC/H.264 is the latest video coding standard, and the performance is far higher than the previous video coding standards. However, due to complex encoding technology and mode selection, the operation complexity is also far higher than the previous standards. In this thesis, we propose a key technology to maintain good image quality for H.264 high compression ratio, which is called In-loop Deblocking Filter IP (ILDF IP), and according to its complex algorithm and filter flow to optimize it further. Different from MPEG-4 and H.263 standards, deblocking filter has become the essential module of the H.264 encoder/decoder flow for H.264 specification. Therefore, how to eliminate blocking signal has become an indispensable link to maintain image quality for future high compression ratio of video decoding. High operation complexity and high memory bandwidth of deblocking filter occupies one-third of total operation amount. However, the proposed IDLE IP design can speedup the operation rate of In-loop Daglocking Filter efficiently, and can reduce the memory usage and save unnecessary bandwidth waste efficiently. We adopt pipeline hardware architecture design to speedup filter performance efficiently which is different from H.264 JM. We adopt special raster scan order of horizontal and vertical filter interleave to save memory efficiently up to 60%, and thus reduce hardware cost. Moreover, this IP can support ILF function needed by H.264 baseline profile and main profile, and support filter process of progressive and interlaced video image at the same time. In IP verification, this IDLE IP has been integrated into our own developed H.264 video decoder system for system functionality verification. In this thesis, we develop an In-loop Deblocking Filter IP to maintain image quality efficiently after decoding and provide a better choice for speeding up multimedia video high quality demands.