Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor
碩士 === 長庚大學 === 電子工程研究所 === 93 === For low-cost, compact, and portability considerations, we proposed a single chip that can capture image by a current mode CMOS image sensor and identify the location of lane marker. Regarding to high recognition rate and hard-wired regularity, we adopted a Peak-Fin...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/41929742219918424166 |
| id |
ndltd-TW-093CGU00686065 |
|---|---|
| record_format |
oai_dc |
| spelling |
ndltd-TW-093CGU006860652016-06-08T04:13:34Z http://ndltd.ncl.edu.tw/handle/41929742219918424166 Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor 結合混合信號模式CMOS影像感測器之汽車車道偵測單晶片 Hsien-Chein Cheng 鄭憲鍵 碩士 長庚大學 電子工程研究所 93 For low-cost, compact, and portability considerations, we proposed a single chip that can capture image by a current mode CMOS image sensor and identify the location of lane marker. Regarding to high recognition rate and hard-wired regularity, we adopted a Peak-Finding based lane detection algorithm and implemented it by mixed mode design. It can reduce the complexity of design and the size of chip. The 64 x 64 pixel array imager fabricated by TSMC 0.35um 2P4M process is proposed to verify the functions of capture image and lane detection. The chip occupies only 2.15mm * 2.31mm and consumes 15mW at 10MHz for a 3.3V supply voltage. Pei-Yung Hsiao 蕭培墉 2005 學位論文 ; thesis 96 zh-TW |
| collection |
NDLTD |
| language |
zh-TW |
| format |
Others
|
| sources |
NDLTD |
| description |
碩士 === 長庚大學 === 電子工程研究所 === 93 === For low-cost, compact, and portability considerations, we proposed a single chip that can capture image by a current mode CMOS image sensor and identify the location of lane marker. Regarding to high recognition rate and hard-wired regularity, we adopted a Peak-Finding based lane detection algorithm and implemented it by mixed mode design. It can reduce the complexity of design and the size of chip.
The 64 x 64 pixel array imager fabricated by TSMC 0.35um 2P4M process is proposed to verify the functions of capture image and lane detection. The chip occupies only 2.15mm * 2.31mm and consumes 15mW at 10MHz for a 3.3V supply voltage.
|
| author2 |
Pei-Yung Hsiao |
| author_facet |
Pei-Yung Hsiao Hsien-Chein Cheng 鄭憲鍵 |
| author |
Hsien-Chein Cheng 鄭憲鍵 |
| spellingShingle |
Hsien-Chein Cheng 鄭憲鍵 Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| author_sort |
Hsien-Chein Cheng |
| title |
Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| title_short |
Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| title_full |
Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| title_fullStr |
Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| title_full_unstemmed |
Automobile Lane Detection System-on-Chip Integrated with Mixed Signal Mode CMOS Image Sensor |
| title_sort |
automobile lane detection system-on-chip integrated with mixed signal mode cmos image sensor |
| publishDate |
2005 |
| url |
http://ndltd.ncl.edu.tw/handle/41929742219918424166 |
| work_keys_str_mv |
AT hsiencheincheng automobilelanedetectionsystemonchipintegratedwithmixedsignalmodecmosimagesensor AT zhèngxiànjiàn automobilelanedetectionsystemonchipintegratedwithmixedsignalmodecmosimagesensor AT hsiencheincheng jiéhéhùnhéxìnhàomóshìcmosyǐngxiànggǎncèqìzhīqìchēchēdàozhēncèdānjīngpiàn AT zhèngxiànjiàn jiéhéhùnhéxìnhàomóshìcmosyǐngxiànggǎncèqìzhīqìchēchēdàozhēncèdānjīngpiàn |
| _version_ |
1718297481361489920 |