| Summary: | 碩士 === 大葉大學 === 電機工程學系碩士班 === 93 === By the advancement of the process technology, power electronic devices（or to name the power devices）use broadly in every kind of power extent. However, due to the process scale down, the ESD immunity level is very poor for power devices. The technique of LDD （Lightly- Doped Drain）, more thinner gate oxide, and the shallow junction depth ... etc., resulting in devices have some reliability and the life-time shortened problems.
In this thesis, we will use the process simulator（TSUPREM-4）and the device electrical simulator（Medici）to design the ESD protection circuits for the LIGBT. From these results of simulation to improve the capability of against ESD zapping, meanwhile, we will accurately design the device structure and the process parameter, and to reach the design of optimization and the ESD protection of target.
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