IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform
碩士 === 國立交通大學 === 電子工程系所 === 93 === This thesis introduces the software implementation of the IEEE 802.16a TDD uplink transceiver system. We integrate the FEC encoder in the transmitter, the synchronizer, the channel equalizer, and the FEC decoder in the receiver. We first do some modifications to t...
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ndltd-TW-093NCTU54280362016-06-06T04:10:40Z http://ndltd.ncl.edu.tw/handle/40701788555132868285 IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform IEEE802.16a分時雙工正交分頻多重進接上行傳收系統在數位訊號處理器平台上之整合及最佳化 Ching Chung Tung 董景中 碩士 國立交通大學 電子工程系所 93 This thesis introduces the software implementation of the IEEE 802.16a TDD uplink transceiver system. We integrate the FEC encoder in the transmitter, the synchronizer, the channel equalizer, and the FEC decoder in the receiver. We first do some modifications to the uplink synchronization algorithm, and then optimize our programs on the digital signal processing (DSP) platform, which includes a personal computer (PC), Innovative Integration’s Quixote DSP board, and the TI’s TMS320C6416 DSP chip. The uplink synchronization mechanism is using the invariance of the preamble which is also known to the base station. We correlate it to the received signals directly, and thus find the first coming subscriber station’s time to reduce the inter-symbol interference. The data formats on this system are all “fixed-point” for improving the computational efficiency in DSP. Our optimization goal is to accelerate the program’s execution speed so that it can satisfy the requirement of real-time processing. We present some optimization techniques, such as software pipelining, and using the intrinsics of DSP, to deal with the most time-consuming parts of the program. We also discuss and analyze the compiler feedbacks to understand how the program works in the DSP. Finally, the speed of the interpolator filter in the transmitter and the uplink synchronizer in the receiver can be improved by 85.58 and 1.74 times, respectively. The computational efficiencies of them are 90.94% and 85.87%, respectively. David W. Lin 林大衛 2005 學位論文 ; thesis 102 zh-TW |
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碩士 === 國立交通大學 === 電子工程系所 === 93 === This thesis introduces the software implementation of the IEEE 802.16a TDD uplink transceiver system. We integrate the FEC encoder in the transmitter, the synchronizer, the channel equalizer, and the FEC decoder in the receiver.
We first do some modifications to the uplink synchronization algorithm, and then optimize our programs on the digital signal processing (DSP) platform, which includes a personal computer (PC), Innovative Integration’s Quixote DSP board, and the TI’s TMS320C6416 DSP chip.
The uplink synchronization mechanism is using the invariance of the preamble which is also known to the base station. We correlate it to the received signals directly, and thus find the first coming subscriber station’s time to reduce the inter-symbol interference.
The data formats on this system are all “fixed-point” for improving the computational efficiency in DSP. Our optimization goal is to accelerate the program’s execution speed so that it can satisfy the requirement of real-time processing. We present some optimization techniques, such as software pipelining, and using the intrinsics of DSP, to deal with the most time-consuming parts of the program. We also discuss and analyze the compiler feedbacks to understand how the program works in the DSP.
Finally, the speed of the interpolator filter in the transmitter and the uplink synchronizer in the receiver can be improved by 85.58 and 1.74 times, respectively. The computational efficiencies of them are 90.94% and 85.87%, respectively.
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David W. Lin |
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David W. Lin Ching Chung Tung 董景中 |
author |
Ching Chung Tung 董景中 |
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Ching Chung Tung 董景中 IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
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Ching Chung Tung |
title |
IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
title_short |
IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
title_full |
IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
title_fullStr |
IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
title_full_unstemmed |
IEEE 802.16a OFDMA TDD uplink transceiver system integration and optimization on DSP platform |
title_sort |
ieee 802.16a ofdma tdd uplink transceiver system integration and optimization on dsp platform |
publishDate |
2005 |
url |
http://ndltd.ncl.edu.tw/handle/40701788555132868285 |
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