Automatic Generation of HDL Code for Regular Expression Matching

碩士 === 國立交通大學 === 電信工程系所 === 93 === The regular expression matching is an important problem that occurs in many areas of science and information processing. In this paper, we design a C code which accepts the regular expression and then outputs a NFA described by verilog language. By means of the NF...

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Bibliographic Details
Main Authors: Wen-Ben Wang, 王文彬
Other Authors: Tsern-Huei Lee
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/01150014767278355053
Description
Summary:碩士 === 國立交通大學 === 電信工程系所 === 93 === The regular expression matching is an important problem that occurs in many areas of science and information processing. In this paper, we design a C code which accepts the regular expression and then outputs a NFA described by verilog language. By means of the NFA circuit, the circuit can read the string and examine whether the substring matches the regular expression or not. Using our approach, the area of the hardware used grow in O(n) , where n is the length of the regular expression. To match a regular expression, GNU grep (DFA) requires O(2^n) memory and approaches using the NFA in [1] require O(n^2) area. Beside the improvement of the area, this new design has not bad performance on debug, suitable device, optimization, easily modifying the circuit. We evaluate our approach on the machine which has a processor of the Pentium 4 and the target device is the APEX EP20K600EBC-6521X.