A Reconfigurable Viterbi Decoder

• Main Authors: Meng-Wei Chuang, 莊孟偉
• Other Authors: Hung-Ta Pai
• Format: Others
• Language: zh-TW
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/81205338934479888659

碩士 === 國立臺灣科技大學 === 電機工程系 === 93 === The reconfigurable technique can support multiple standards in the same hardware. Now a reconfigurable Viterbi decoder can only decode one of the NSC (Non-systematic and Recursive Systematic Convolutional Codes) and RSC (Systematic and Recursive Systematic Convolutional Codes) encoder. Both NSC and RSC are often used in the channel encoder at present. So, the goal of a reconfigurable Viterbi decoder would be to have the ability to combine the NSC and RSC. In this thesis, we propose an architecture for a reconfigurable Viterbi decoder that can dynamically adapt to changes in the encoding parameters such as the constraint length, code rate, and generator polynomials. The proposed architecture can be used to realize a reconfigurable Viterbi decoder which can decode the NSC and RSC encoder. Besides, we also use the BCG (Branch Codeword Generator) which can generate the branch codeword to support more applications.