Summary: | 碩士 === 國防大學中正理工學院 === 電子工程研究所 === 94 === It is very important that error correct coding for digital communication. RS code is even more popularly application on digital communication and storage medium as error correct coding algorithm and correct the error by channel. For bursty error and random error, RS code can provide excellent error correct capability. So it is used for channel coding usually.
This paper emphasizes on the part of decoder and bases on modified Euclidean algorithm to enter a concept of linear feedback shift register in it. When we use Euclidean algorithm to arithmetic, we often employ great common division to solve quotient and remainder with recursion continuously. It greatly makes use of the operation of addition and multiplication that result in decreasing the speed of calculation. If we use the architecture of LFSR, we could take place of multiplication by division and reduce the number of arithmetic unit to simplify circuit. After that we find the method of ridding of timing control and check with c program. Finally, we simulate the produced architecture by VHDL.
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