Hole confinement in double-channel SiGe PMOSFET
碩士 === 正修科技大學 === 電子工程研究所 === 94 === A working p-type SiGe metal-oxide-semiconductor field effect transistor (pMOSFETs), utilizing a double quantum wells as the buried conducting channel, has been successfully fabricated. The upper quantum well with 15%-Ge acts as a induced-carrier buffer to slow ho...
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ndltd-TW-094CSU004280062015-10-28T04:06:51Z http://ndltd.ncl.edu.tw/handle/71039114370025604107 Hole confinement in double-channel SiGe PMOSFET 矽鍺雙通道元件電洞侷限能力之探討 Chin-Yuan Wu 吳進元 碩士 正修科技大學 電子工程研究所 94 A working p-type SiGe metal-oxide-semiconductor field effect transistor (pMOSFETs), utilizing a double quantum wells as the buried conducting channel, has been successfully fabricated. The upper quantum well with 15%-Ge acts as a induced-carrier buffer to slow holes into the Si surface channel and increases the number of high-mobility holes in the 30%-Ge well at the bottom under high gate voltage by improving carrier confinement. Experimental results show that the devices with thinner Si-spacer layer between the two SiGe quantum wells exhibit excellent property of not only a higher effective hole mobility and wider gate voltage swings due to the better carrier confinement, which shows great potential for RF applications that require high speed, and high linearity. 吳三連 吳忠義 張守進 傅以勇 陳進祥 2006 學位論文 ; thesis 63 zh-TW |
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碩士 === 正修科技大學 === 電子工程研究所 === 94 === A working p-type SiGe metal-oxide-semiconductor field effect transistor (pMOSFETs), utilizing a double quantum wells as the buried conducting channel, has been successfully fabricated. The upper quantum well with 15%-Ge acts as a induced-carrier buffer to slow holes into the Si surface channel and increases the number of high-mobility holes in the 30%-Ge well at the bottom under high gate voltage by improving carrier confinement. Experimental results show that the devices with thinner Si-spacer layer between the two SiGe quantum wells exhibit excellent property of not only a higher effective hole mobility and wider gate voltage swings due to the better carrier confinement, which shows great potential for RF applications that require high speed, and high linearity.
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吳三連 |
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吳三連 Chin-Yuan Wu 吳進元 |
author |
Chin-Yuan Wu 吳進元 |
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Chin-Yuan Wu 吳進元 Hole confinement in double-channel SiGe PMOSFET |
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Chin-Yuan Wu |
title |
Hole confinement in double-channel SiGe PMOSFET |
title_short |
Hole confinement in double-channel SiGe PMOSFET |
title_full |
Hole confinement in double-channel SiGe PMOSFET |
title_fullStr |
Hole confinement in double-channel SiGe PMOSFET |
title_full_unstemmed |
Hole confinement in double-channel SiGe PMOSFET |
title_sort |
hole confinement in double-channel sige pmosfet |
publishDate |
2006 |
url |
http://ndltd.ncl.edu.tw/handle/71039114370025604107 |
work_keys_str_mv |
AT chinyuanwu holeconfinementindoublechannelsigepmosfet AT wújìnyuán holeconfinementindoublechannelsigepmosfet AT chinyuanwu xìduǒshuāngtōngdàoyuánjiàndiàndòngjúxiànnénglìzhītàntǎo AT wújìnyuán xìduǒshuāngtōngdàoyuánjiàndiàndòngjúxiànnénglìzhītàntǎo |
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