Low power receiver interface for implantable microstimulator
碩士 === 中原大學 === 電子工程研究所 === 94 === Abstract The purposed of this article provide an improvement of micro-stimulator. Implantable microstimulator is implementation by IPG (Internal pulse generator) which power by battery or RF (Radio Frequency) which power by coil. The circuits are designed with rec...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/69002201293774485627 |
| Summary: | 碩士 === 中原大學 === 電子工程研究所 === 94 === Abstract
The purposed of this article provide an improvement of micro-stimulator. Implantable microstimulator is implementation by IPG (Internal pulse generator) which power by battery or RF (Radio Frequency) which power by coil. The circuits are designed with rechargeable concept by combining RF and IPG. In our circuits, not only lower power consumption in the power recovery stage but also provide energy to satisfy inner part of non-stimulator such as digital building block. As the aspect of circuit improvement, we adopt a capacitor as high pass filter for low layout area consideration and decode the signal by using manchester decoder. We also design a unpack process to recovery the control data. Besides, we design a high PSRR (Power Supply Rejection Ration) core voltage reference to reduce ripple noise from outside. The stable voltage reference is connected to a voltage regulator to supply other stage current and voltage. The total circuits are designed with low power consideration.
Furthermore we structure a RF implantable microstimulator energy transmitter module board to verify the integrated circuit. The implantable microstimulator inner power and data receiver circuits are fabricated in a 0.35um 2P4M CMOS technology in CIC (Chip Implement Center). The total system power consumption is less than 0.35mW.
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