A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology

碩士 === 華梵大學 === 電子工程學系碩士班 === 94 === In this thesis, a novel CMOS fractional-N frequency synthesizer in TSMC 3.3V 2p4m technology is presented. The synthesizer has 84 channels, with a channel spacing of 1 MHz. The chip contains a ROM-based fractional-N frequency divider, a five-ring-interlocked volt...

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Main Authors: Cheng-Chin Li, 李承志
Other Authors: Chia-Yu Yao
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/05215092218325721004
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spelling ndltd-TW-094HCHT04280052015-12-21T04:04:33Z http://ndltd.ncl.edu.tw/handle/05215092218325721004 A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology 0.35umCMOSROM-based1.6GHz新型頻率合成器 Cheng-Chin Li 李承志 碩士 華梵大學 電子工程學系碩士班 94 In this thesis, a novel CMOS fractional-N frequency synthesizer in TSMC 3.3V 2p4m technology is presented. The synthesizer has 84 channels, with a channel spacing of 1 MHz. The chip contains a ROM-based fractional-N frequency divider, a five-ring-interlocked voltage-control oscillator (VCO), a phase frequency detector (PFD), a charge pump, and the loop filter. The frequency divider improves the divisor sequences generated by the mash delta sigma modulator. The modified sequences are stored in a ROM. The VCO possesses a configuration of five rings interlocked together that has better phase noise performance than a single ring structure. The phase noise and stability issues are discussed in this thesis. Chia-Yu Yao 姚嘉瑜 2006 學位論文 ; thesis 61 zh-TW
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language zh-TW
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description 碩士 === 華梵大學 === 電子工程學系碩士班 === 94 === In this thesis, a novel CMOS fractional-N frequency synthesizer in TSMC 3.3V 2p4m technology is presented. The synthesizer has 84 channels, with a channel spacing of 1 MHz. The chip contains a ROM-based fractional-N frequency divider, a five-ring-interlocked voltage-control oscillator (VCO), a phase frequency detector (PFD), a charge pump, and the loop filter. The frequency divider improves the divisor sequences generated by the mash delta sigma modulator. The modified sequences are stored in a ROM. The VCO possesses a configuration of five rings interlocked together that has better phase noise performance than a single ring structure. The phase noise and stability issues are discussed in this thesis.
author2 Chia-Yu Yao
author_facet Chia-Yu Yao
Cheng-Chin Li
李承志
author Cheng-Chin Li
李承志
spellingShingle Cheng-Chin Li
李承志
A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
author_sort Cheng-Chin Li
title A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
title_short A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
title_full A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
title_fullStr A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
title_full_unstemmed A Novel ROM-based 1.6GHz Frequency Synthesizer in 0.35um CMOS Technology
title_sort novel rom-based 1.6ghz frequency synthesizer in 0.35um cmos technology
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/05215092218325721004
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