5.8GHz CMOS Front-End Circuit Design

• Main Authors: Yo-Wei Chang, 張育瑋
• Other Authors: Chia-Yu Yao
• Format: Others
• Language: zh-TW
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/62993036363760539268

碩士 === 華梵大學 === 電子工程學系碩士班 === 94 === This thesis presents a 802.11a WLAN 5.8GHz CMOS Front-End circuit design in UMC 0.18um CMOS process. The chip contains Low Noise Amplifier, Passive Balun, Active Inductor, Gilbert Cell Mixer and Single-Ended Amplifier. The RF spectrum specification is from 5.725~5.825GHz, the LO is from 5.237GHz~5.337GHz, and the IF is at 488MHz. The low noise amplifier exhibits a gain of 18.26dB, noise figure of 2.38dB, input P1dB at -26.5dBm, and output P1dB at -9.69dBm. The Gilbert cell mixer exhibits a conversion gain of 33.62dB, noise figure of 15.38dB, input P1dB at -31.9dBm and output P1dB at -0.61dBm. The whole CMOS Front-End circuit exhibits a gain of 43.56dB, noise figure of 6.88dB, input P1dB at -41.1dBm and output P1dB at 1.05dBm.