| Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === This thesis proposes an uninterruptible power supply (UPS) system with digital and analog controller to realize this system. The DC/AC inverter uses a field-programmable gate array (FPGA) as a controller to achieve the digital pulse-width-modulation (PWM) control. Then, the verilog hardware description language (VHDL) is used to write the control procedures and ISE6.3 is served as the software development platform to perform syntax testing. Furthermore, the power factor correction (PFC) circuit, the charge circuit, and the spare power circuit are controlled by analog circuits. In addition, the FPGA is used to control the battery charge and spare power circuits. Under the normal utility-line power supply condition, the boost PFC circuit provides DC bus voltage the load and also maintain battery at the highest capacity. While the utility-line power is abnormally interrupted, the batteries supply the energy for the inverter to maintain a stable AC voltage supply for the load system. Finally, a 600W UPS system is implemented to verify the functionalities of the proposed designs.
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