| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 94 === A 3.1-10.6 GHZ low noise amplifier is applied for ultra-wideband, it introduces RL feedback for input matching. And current buffer is used for output matching. This research is fabricated in 0.18-μm CMOS process. Three amplified stages are formed for main topology in low noise amplifier. The first stage introduces RL-feedback configuration, it can improve the bandwidth. The second stage introduces traditional CS configuration, it can improve the average forward S21. The third stage introduces current buffer configuration, it is used for output matching. Relatively flat gain is essential over the entire desired band. The low noise amplifier introduces the shunt peaking to achieve the above purpose. The total power dissipation of the chip is about 29 mW at power supply 1.8 volt. The chip size included pad is 0.776 mm2. The measurement result of this study expect that the average forward S21 is 6.9dB at 3.1-10.6GHz, the reverse isolation S12 is under -33dB, the magnitude of S11 is under -10 dB, the magnitude of S22 is under -16dB, and the noise figure is 6dB.
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