Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation

碩士 === 國立交通大學 === 電子工程系所 === 94 === With modern day advances in computer processing and multimedia applications, improvements in the area of image processing and video compression are analogous. Video compression allows the reduction of high-resolution video into a more compact memory space to there...

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Main Authors: Yu-Jen Wang, 王裕仁
Other Authors: Tian-Sheuan Chang
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/53742069394614817013
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spelling ndltd-TW-094NCTU54281012016-05-27T04:18:35Z http://ndltd.ncl.edu.tw/handle/53742069394614817013 Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation H.264/MPEG-4AVC移動估測的快速演算法與架構設計 Yu-Jen Wang 王裕仁 碩士 國立交通大學 電子工程系所 94 With modern day advances in computer processing and multimedia applications, improvements in the area of image processing and video compression are analogous. Video compression allows the reduction of high-resolution video into a more compact memory space to thereby reduce storage and video processing resources during playback. According to the literature published before, we can find that the motion estimation process is the most time consumed part. To further realize this process, we can mainly divide it into two parts: integer motion estimation and fractional motion estimation. Integer motion estimation cost most part of time under the original algorithm unchanged. The main reason is that the search window is too large. So we have a very simple idea that we want to decrease the search window. We can reduce 88% (input sequence as CIF size) and 75% (input sequence as D1 size) search points respectively. Fractional motion estimation will not affect obviously under the original condition. But when the fast algorithm is applied for integer motion estimation, the portion of encoding time due to fractional motion estimation is getting larger. Based on the assumption of uni-modal error surface, we want to use the results of half pixel step to predict the slope of error surface. We also apply early termination technique. We can get 50% search points reduction in this part. By applying both fast algorithms, we get 20 times speed up with the input sequence size as 1280 x 720. Making use of hardware parallelism to speed up is also a common method in H.264 research field. By the benefit of applying fast fractional motion estimation algorithm, we decrease 40% area and speed up by 14% in our fast fractional motion estimation architecture. Tian-Sheuan Chang 張添烜 2006 學位論文 ; thesis 71 zh-TW
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description 碩士 === 國立交通大學 === 電子工程系所 === 94 === With modern day advances in computer processing and multimedia applications, improvements in the area of image processing and video compression are analogous. Video compression allows the reduction of high-resolution video into a more compact memory space to thereby reduce storage and video processing resources during playback. According to the literature published before, we can find that the motion estimation process is the most time consumed part. To further realize this process, we can mainly divide it into two parts: integer motion estimation and fractional motion estimation. Integer motion estimation cost most part of time under the original algorithm unchanged. The main reason is that the search window is too large. So we have a very simple idea that we want to decrease the search window. We can reduce 88% (input sequence as CIF size) and 75% (input sequence as D1 size) search points respectively. Fractional motion estimation will not affect obviously under the original condition. But when the fast algorithm is applied for integer motion estimation, the portion of encoding time due to fractional motion estimation is getting larger. Based on the assumption of uni-modal error surface, we want to use the results of half pixel step to predict the slope of error surface. We also apply early termination technique. We can get 50% search points reduction in this part. By applying both fast algorithms, we get 20 times speed up with the input sequence size as 1280 x 720. Making use of hardware parallelism to speed up is also a common method in H.264 research field. By the benefit of applying fast fractional motion estimation algorithm, we decrease 40% area and speed up by 14% in our fast fractional motion estimation architecture.
author2 Tian-Sheuan Chang
author_facet Tian-Sheuan Chang
Yu-Jen Wang
王裕仁
author Yu-Jen Wang
王裕仁
spellingShingle Yu-Jen Wang
王裕仁
Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
author_sort Yu-Jen Wang
title Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
title_short Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
title_full Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
title_fullStr Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
title_full_unstemmed Fast Algorithms and Architecture Designs for H.264/MPEG-4 AVC Motion Estimation
title_sort fast algorithms and architecture designs for h.264/mpeg-4 avc motion estimation
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/53742069394614817013
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