| Summary: | 碩士 === 國立交通大學 === 電機與控制工程系所 === 94 === In this thesis, several optimized techniques in the AAC encoding process are presented in order to lower down the computational complexity and required memory. The decision of block switching is removed, and adopts a simplified psychoacoustic model. For the MDCT transformation, the fast MDCT with FFT as kernel computation is applied. Moreover, the memory requirement while performing FFT processing is reduced. Other modules, such as TNS, Mid/Side Stereo coding are also simplified. In order to minimize the memory usage, the Huffman tables are reduced base on statistics.So as to make sure the avoidance of the overflow computation and preserve the data precision, a simple dynamic scaling unit before energy calculations is applied. The proposed AAC encoder is implemented on a dual-core processor. Based-on the different software architecture, two solutions for recording system implementation are provided. The realized
AAC encoder consumes 86MIPS and 107KB memory, and the recording system implemented by ARM can achieve at least 1X encoding.
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