| Summary: | 博士 === 國立中山大學 === 電機工程學系研究所 === 94 === High-speed systems and mobile systems are the main trends of the IC developments in these years. A high-speed system must have high-speed calculation units, such as CPUs and DSPs, and high speed memories.
A high speed P-latch N-drive 4-T SRAM cell using the dual
threshold voltage transistors is proposed in thesis. The high-Vth transistors are used to construct data storage latches, and the low-Vth transistors are used to improve driving capability and speed. Meanwhile, a DLL-based
frequency multiplier which can provide the high speed clocks in the high speed SRAMs is also proposed. Besides a current mirror, the rest of the DLL-based frequency multiplier is a purely digital logic, which in turn
eliminates the noise prone problem.
Modern mobile systems usually demand a fast frequency hopping and a precise modulation. We introduce a novel method utilizing the trigonometric quadruple angle formula to reduce the spurious tones of the DDFSs, which can serve as a cosine function generator for the mobile systems. The proposed DDFS has a very high resolution. The fast frequency hopping can be achieved by the DDFS and the frequency multiplier serving a local oscillator.
|
|---|
