| Summary: | 碩士 === 國立清華大學 === 通訊工程研究所 === 94 === In this thesis, we implement the basic structure of WiMAX receiver and verify it with post layout simulation. In our chip design, it consists of low power packet detection, carrier frequency compensation and recursive FFT. In the packet detection and carrier frequency compensation, we propose the mapping function to achieve low power design. In the FFT design, we use the radix 8 recursive FFT to achieve small area design. Finally, we can see this WiMAX chip layout view and some verification.
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