All-Digital Fast-Locking Delay-Locked Loop with Duty Cycle Correction
碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === With the evolution and continuing scaling of CMOS technologies, the demand of high speed and high integration density VLSI systems have the exponential growth recently. However, the synchronization problem among IC modules is undoubtedly important and becoming o...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60142693822760595477 |