The Study of Differential Complementary Colpitts VCO and Injection Locked Frequency Divider

• Main Authors: Chung-Ching Chiu, 邱仲慶
• Other Authors: Sheng-Lyang Jang
• Format: Others
• Language: en_US
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/44bsb8

碩士 === 國立臺灣科技大學 === 電子工程系 === 94 === ABSTRACT This thesis is mainly composed of two topics. First, we present a 0.35-μm CMOS frequency divider realized with a ring oscillator and a direct injection-locking technique. The divide-by-2 FD circuit consists of a 2-stage differential CMOS ring oscillator with n-MOS switches directly coupled to its differential outputs, the measured phase noise of the divide-by-2 divider is -98dBc/Hz at 1MHz offset from the free running frequency of 939MHz. The low-voltage CMOS divide-by-2 FD has been implemented with the TSMC 0.35 μm CMOS technology and the power consumption is 27 mW at the supply voltage of 3.3 V. At the input power of -5dbm, the divider-by-2 FD can function properly with about 1640MHz locking range from 1.28GHz to 2.92GHz, featuring a 87% locking range. And finally this thesis presents a new differential CMOS voltage controlled oscillator (VCO). The topology of the proposed differential VCO is a combination of Colpitts VCO and cross-coupled VCO. A symmetric transformer and differential differentially tuned MOS varactors are used to reduce phase noise. The VCO has been fabricated with the 0.18-μm CMOS process. At the 1.2-V supply voltage, the output frequency of VCO is from 5.99GHz to 6.43GHz with 441MHz tuning range and a phase noise of -118.5dBc/Hz at a 1MHz offset from the center frequency of 6.43GHz. Its core current consumption is 2.8 mA and the core power consumption is 3.36mW. The total power consumption of this VCO is 9.12mW. The figure of merit (FoM) of this differential VCO is -189.4 dBc.