The Realization of the Multi-mode Beamformer using FPGA
碩士 === 元智大學 === 通訊工程學系 === 94 === Following the DSRC vehicular communications IEEE802.11p physical layer sandards, this paper presents the implementatin of a multi-mode beamfomer with FPGA. The beamforming processing time of the multi-mode beamfomer is 0.033μsec, which is less than the sample interv...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80593483946973807362 |
| Summary: | 碩士 === 元智大學 === 通訊工程學系 === 94 === Following the DSRC vehicular communications IEEE802.11p physical layer sandards, this paper presents the implementatin of a multi-mode beamfomer with FPGA. The beamforming processing time of the multi-mode beamfomer is 0.033μsec, which is less than the sample interval (0.05μsec) in order to satisfy the requirment of real-time DSRC communications.The multi-mode beamformer has three modes: FFT multiple beamforming for mode 1, differential pattern DOA estimation for mode 2 and nulling for mode 3. The concept of software define radio(SDR) is applied for the multi-mode beamformer. SDR changes functionality by setting parameters of module and switching in different software stacks through the PC controller, offers software driven and has ability to change the functions of system through software.
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