The Realization of the Multi-mode Beamformer using FPGA

The Realization of the Multi-mode Beamformer using FPGA

碩士 === 元智大學 === 通訊工程學系 === 94 === Following the DSRC vehicular communications IEEE802.11p physical layer sandards, this paper presents the implementatin of a multi-mode beamfomer with FPGA. The beamforming processing time of the multi-mode beamfomer is 0.033μsec, which is less than the sample interv...

Full description

Bibliographic Details
Main Authors: Jun-Jie Hong, 洪俊傑
Other Authors: Jeich Mar
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/80593483946973807362
id ndltd-TW-094YZU05650003
record_format oai_dc
spelling ndltd-TW-094YZU056500032016-06-01T04:15:07Z http://ndltd.ncl.edu.tw/handle/80593483946973807362 The Realization of the Multi-mode Beamformer using FPGA 多模式波束成型之FPGA實現 Jun-Jie Hong 洪俊傑 碩士 元智大學 通訊工程學系 94 Following the DSRC vehicular communications IEEE802.11p physical layer sandards, this paper presents the implementatin of a multi-mode beamfomer with FPGA. The beamforming processing time of the multi-mode beamfomer is 0.033μsec, which is less than the sample interval (0.05μsec) in order to satisfy the requirment of real-time DSRC communications.The multi-mode beamformer has three modes: FFT multiple beamforming for mode 1, differential pattern DOA estimation for mode 2 and nulling for mode 3. The concept of software define radio(SDR) is applied for the multi-mode beamformer. SDR changes functionality by setting parameters of module and switching in different software stacks through the PC controller, offers software driven and has ability to change the functions of system through software. Jeich Mar 馬杰 2006 學位論文 ; thesis 60 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 元智大學 === 通訊工程學系 === 94 === Following the DSRC vehicular communications IEEE802.11p physical layer sandards, this paper presents the implementatin of a multi-mode beamfomer with FPGA. The beamforming processing time of the multi-mode beamfomer is 0.033μsec, which is less than the sample interval (0.05μsec) in order to satisfy the requirment of real-time DSRC communications.The multi-mode beamformer has three modes: FFT multiple beamforming for mode 1, differential pattern DOA estimation for mode 2 and nulling for mode 3. The concept of software define radio(SDR) is applied for the multi-mode beamformer. SDR changes functionality by setting parameters of module and switching in different software stacks through the PC controller, offers software driven and has ability to change the functions of system through software.
author2 Jeich Mar
author_facet Jeich Mar
Jun-Jie Hong
洪俊傑
author Jun-Jie Hong
洪俊傑
spellingShingle Jun-Jie Hong
洪俊傑
The Realization of the Multi-mode Beamformer using FPGA
author_sort Jun-Jie Hong
title The Realization of the Multi-mode Beamformer using FPGA
title_short The Realization of the Multi-mode Beamformer using FPGA
title_full The Realization of the Multi-mode Beamformer using FPGA
title_fullStr The Realization of the Multi-mode Beamformer using FPGA
title_full_unstemmed The Realization of the Multi-mode Beamformer using FPGA
title_sort realization of the multi-mode beamformer using fpga
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/80593483946973807362
work_keys_str_mv AT junjiehong therealizationofthemultimodebeamformerusingfpga
AT hóngjùnjié therealizationofthemultimodebeamformerusingfpga
AT junjiehong duōmóshìbōshùchéngxíngzhīfpgashíxiàn
AT hóngjùnjié duōmóshìbōshùchéngxíngzhīfpgashíxiàn
AT junjiehong realizationofthemultimodebeamformerusingfpga
AT hóngjùnjié realizationofthemultimodebeamformerusingfpga
_version_ 1718288353033453568

Similar Items