Using an FPGA Chip to Design a High-speed Control System for Multiple Sets of Programmable DC Electronic Loads

• Main Authors: Chao-Shun Kuo, 郭肇勳
• Other Authors: Ying-Wen Bai
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/62854311717059008126

碩士 === 輔仁大學 === 電子工程學系 === 95 === The purpose of this paper is to design a high-speed control system for programmable DC electronic loads by combining an FPGA chip and a MCU (microcontroller unit). VHDL (Very High Speed Integrated Circuit Hardware Description Language) is used to devise a configurable control mechanism for a DCS (dynamic control system). Utilizing a programmable design and effective formulation in memory modules to design the commutation interface between MCU and FPGA chip, we replace the hardware design by the software controls of the peripheral circuits that add to the elasticity of the circuit design and lessen the resource demand by the MCU, to further simplify the procedure of the software design and to improve the design efficiency. By means of simulation and verification using the FPGA chip as our development tool we carry out experiments with the dynamic control system for programmable DC electronic loads. Our design provides the advantage of speeding the process of the hardware carrying out the concurrent output control for many peripheral circuits, allowing the setting of the programmable parameters of 100 sets to send out each datum synchronously when the Run Program Mode is in high data rate. This high data rate provides the timing demand of many peripheral circuits which are controlled by a time-sharing process. The shortest duration of each set reaches 25 µS, using our design which provides a constant current to sink stably under the Constant Load Mode with the error rate under 1%. The Dynamic Load Mode provides accuracy of duration, and switching frequency can reach 20 KHz.