Design of Ultra-wideband low voltage low noise amplifier for 3.1 - 10.6 GHz
碩士 === 崑山科技大學 === 電子工程研究所 === 95 === In this thesis, we have been designed and finished Ultra-wideband low voltage low-noise amplifier by TSMC 0.18-μm CMOS process. Also, make use of EM analysis considering parasitical effect to reach more precisely circuit design. Then we through National Chip Impl...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Published: |
2007
|
Online Access: | http://ndltd.ncl.edu.tw/handle/25321763385661055504 |