A Novel Direction Detection Algorithm and Its VLSI Design for Fast H.264 Intra Prediction

• Main Authors: Wei-guang Lin, 林韋光
• Other Authors: Jhing-Fa Wang
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/48126523524727715080

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === The H.264/MPEG-4 Part 10 Advanced Video Coding (AVC) is a latest coding standard that is developed by Joint Video Team of ITU-T VCEG and ISO/IEC MPEG. The goal of H.264/AVC is to achieve better coding efficiency than the existing video coding standards. Hence, H.264 employs the computationally extensive rate distortion optimization (RDO) technique to examine exhaustively all possible modes for finding the best mode. There are nine prediction modes in intra 4x4 prediction, and four modes in intra 16x16 and 8x8 predictions. Although full search strategy achieves high coding performance, but large computation complexity makes it timing-wasting and unpractical. In this thesis, we propose a novel and efficient but reliable direction detection algorithm. The proposed methods effectively estimate the major direction inside the block to narrow down the predictive modes to reduce the RDO computation. Experimental results show that the proposed methods can reduce the encoding time by about 60% with negligible loss of coding performance. For the hardware architecture design, a fast mode decision VLSI circuit for intra prediction with the silicon core size of 0.12x0.12 mm2 at 0.18 �慆 CMOS technology is implemented. A three-stage pipelined architecture operated at 173 MHz can encode 30 fps real-time videos up to Level 5. Owing to the low cost, high speed and low power issues in SOC design, our work would be an attractive hardware or software intellectual property (IP) for real-time application and H.264 encoder realization.