SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === In this paper, we have designed and implemented a Multi-Threaded Java Virtual Machine (MTJVM) which is composed of multiple processing elements (PEs) and can directly execute Java threads concurrently without any software/OS support. Threads will be dynamicall...
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ndltd-TW-095NCKU54421722015-10-13T13:59:58Z http://ndltd.ncl.edu.tw/handle/73898344616516441541 SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM 可延展型多執行緒爪哇虛擬機器之系統晶片軟硬體協同設計 Yung-Chao Chen 陳泳超 碩士 國立成功大學 電機工程學系碩博士班 95 In this paper, we have designed and implemented a Multi-Threaded Java Virtual Machine (MTJVM) which is composed of multiple processing elements (PEs) and can directly execute Java threads concurrently without any software/OS support. Threads will be dynamically dispatched to PEs and run simultaneously toward Thread-Level-Parallelism (TLP). The thread processing mechanisms and instructions, such as real-time scheduling, sleep, wait, yield, and synchronization, are handled by two new global controllers, the thread-manager and the memory-manager. The complete system has been coded and synthesized in C and VHDL for its software and hardware parts, respectively. As the experiment results shown, the performance and the area of it are scalable with the number of PEs used, and it works at 96.8 MHz. Jer-Min Jou 周哲民 2007 學位論文 ; thesis 65 zh-TW |
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碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === In this paper, we have designed and implemented a Multi-Threaded Java Virtual Machine (MTJVM) which is composed of multiple processing elements (PEs) and can directly execute Java threads concurrently without any software/OS support. Threads will be dynamically dispatched to PEs and run simultaneously toward Thread-Level-Parallelism (TLP). The thread processing mechanisms and instructions, such as real-time scheduling, sleep, wait, yield, and synchronization, are handled by two new global controllers, the thread-manager and the memory-manager. The complete system has been coded and synthesized in C and VHDL for its software and hardware parts, respectively. As the experiment results shown, the performance and the area of it are scalable with the number of PEs used, and it works at 96.8 MHz.
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Jer-Min Jou |
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Jer-Min Jou Yung-Chao Chen 陳泳超 |
author |
Yung-Chao Chen 陳泳超 |
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Yung-Chao Chen 陳泳超 SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
author_sort |
Yung-Chao Chen |
title |
SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
title_short |
SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
title_full |
SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
title_fullStr |
SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
title_full_unstemmed |
SoC SW/HW Co-Design of A Scalable Multi-Threaded JVM |
title_sort |
soc sw/hw co-design of a scalable multi-threaded jvm |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/73898344616516441541 |
work_keys_str_mv |
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