Implementation of RF Receiver Front-End Circuits for V-Band Applications
碩士 === 國立中央大學 === 電機工程研究所 === 95 === The thesis presents the of RF front-end circuits for V-band receiver, which are both implemented on WINTM 0.15-μm pHEMT and TSMC 0.18-μm CMOS technologies. The implemented circuits include a low noise amplifier, a transformer feedback voltage controlled oscillato...
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ndltd-TW-095NCU054420452015-10-13T13:59:55Z http://ndltd.ncl.edu.tw/handle/44500886063697005837 Implementation of RF Receiver Front-End Circuits for V-Band Applications 應用於V頻段射頻接收機前端電路之研製 Chia-Chun Yang 楊家軍 碩士 國立中央大學 電機工程研究所 95 The thesis presents the of RF front-end circuits for V-band receiver, which are both implemented on WINTM 0.15-μm pHEMT and TSMC 0.18-μm CMOS technologies. The implemented circuits include a low noise amplifier, a transformer feedback voltage controlled oscillator, a sub-harmonically pumped resistive mixer, and a doubly balance star mixer. The sub-harmonically pumped resistive mixer includes an LO stacked Marchand balun and a miniaturized RF power divider. The stacked layout for LO balun is used to increase the coupling factor and obtain the low insertion loss and compact size which commonly used in planar balun. The RF power divider utilizes the reduce-size technique to miniaturize the required λ/4 transmission line. Therefore, the mixer accomplishes a compact chip size, for instance, the doubly balanced star mixer was realized by two proposed dual baluns and achieved a very compact form factor. The reduced sized dual balun can be simply realized by shunting overlay capacitance at the input, output, or end of balun. The designed miniature dual balun can save more than 60% chip area in comparison to that in conventional dual balun. In low noise amplifier, a 52.7 GHz three cascade stages low noise amplifier achieved a power gain of 13.59 dB, input/output return losses of 11.76 dB and 12.81 dB, respectively. The measured 1-dB gain compression point was -12 dBm, and simulated noise figure was 4.06 dB at 60 GHz. In voltage controlled oscillator, a 26.2 GHz transformer feedback voltage controlled oscillator obtained a tuning range of 437 MHz, an output power of -4.76 ~ -1.83 dBm. A -100.3 dBc/Hz phase noise at 1 MHz offset frequency was measured under the power consumption of 9.6 mW. In mixer design, a 60 GHz sub-harmonically pumped resistive mixer achieved the conversion loss of 14.96 dB, a input 1-dB gain compression point of 10 dBm, an input third order intermodulation intercept point of 28 dBm, an LO to IF isolation of better than 35 dB, an LO to RF isolation of greater than 35 dB, an RF to IF isolation of greater than 19 dB. The chip area yields a compact size less than 0.99 × 0.82 mm2. A 60 GHz doubly balanced star mixer achieved a conversion loss of 8.99 dB, an input 1-dB gain compression point of 8.27 dBm, an LO to IF isolation of better than 24 dB, an LO to RF isolation of greater than 20 dB, an RF to IF isolation of greater than 35 dB. The fabricated chip area is only 0.68 × 0.59 mm2. 邱煥凱 2007 學位論文 ; thesis 79 zh-TW |
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碩士 === 國立中央大學 === 電機工程研究所 === 95 === The thesis presents the of RF front-end circuits for V-band receiver, which are both implemented on WINTM 0.15-μm pHEMT and TSMC 0.18-μm CMOS technologies. The implemented circuits include a low noise amplifier, a transformer feedback voltage controlled oscillator, a sub-harmonically pumped resistive mixer, and a doubly balance star mixer.
The sub-harmonically pumped resistive mixer includes an LO stacked Marchand balun and a miniaturized RF power divider. The stacked layout for LO balun is used to increase the coupling factor and obtain the low insertion loss and compact size which commonly used in planar balun. The RF power divider utilizes the reduce-size technique to miniaturize the required λ/4 transmission line. Therefore, the mixer accomplishes a compact chip size, for instance, the doubly balanced star mixer was realized by two proposed dual baluns and achieved a very compact form factor. The reduced sized dual balun can be simply realized by shunting overlay capacitance at the input, output, or end of balun. The designed miniature dual balun can save more than 60% chip area in comparison to that in conventional dual balun. In low noise amplifier, a 52.7 GHz three cascade stages low noise amplifier achieved a power gain of 13.59 dB, input/output return losses of 11.76 dB and 12.81 dB, respectively. The measured 1-dB gain compression point was -12 dBm, and simulated noise figure was 4.06 dB at 60 GHz. In voltage controlled oscillator, a 26.2 GHz transformer feedback voltage controlled oscillator obtained a tuning range of 437 MHz, an output power of -4.76 ~ -1.83 dBm. A -100.3 dBc/Hz phase noise at 1 MHz offset frequency was measured under the power consumption of 9.6 mW.
In mixer design, a 60 GHz sub-harmonically pumped resistive mixer achieved the conversion loss of 14.96 dB, a input 1-dB gain compression point of 10 dBm, an input third order intermodulation intercept point of 28 dBm, an LO to IF isolation of better than 35 dB, an LO to RF isolation of greater than 35 dB, an RF to IF isolation of greater than 19 dB. The chip area yields a compact size less than 0.99 × 0.82 mm2. A 60 GHz doubly balanced star mixer achieved a conversion loss of 8.99 dB, an input 1-dB gain compression point of 8.27 dBm, an LO to IF isolation of better than 24 dB, an LO to RF isolation of greater than 20 dB, an RF to IF isolation of greater than 35 dB. The fabricated chip area is only 0.68 × 0.59 mm2.
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author2 |
邱煥凱
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author_facet |
邱煥凱
Chia-Chun Yang 楊家軍 |
author |
Chia-Chun Yang 楊家軍 |
spellingShingle |
Chia-Chun Yang 楊家軍 Implementation of RF Receiver Front-End Circuits for V-Band Applications |
author_sort |
Chia-Chun Yang |
title |
Implementation of RF Receiver Front-End Circuits for V-Band Applications |
title_short |
Implementation of RF Receiver Front-End Circuits for V-Band Applications |
title_full |
Implementation of RF Receiver Front-End Circuits for V-Band Applications |
title_fullStr |
Implementation of RF Receiver Front-End Circuits for V-Band Applications |
title_full_unstemmed |
Implementation of RF Receiver Front-End Circuits for V-Band Applications |
title_sort |
implementation of rf receiver front-end circuits for v-band applications |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/44500886063697005837 |
work_keys_str_mv |
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