A VILW-Based Post Compilation Framework for Multimedia Embedded DSPs with Hardware Specific Optimizations

• Main Author: 鄭孟璿
• Other Authors: 鍾葉青
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/52277141716129019375

碩士 === 國立清華大學 === 資訊工程學系 === 95 === In the high performance and low power multimedia embedded system design, the VLIW-based embedded DSPs which need compiler to exploit the ILP become popular and play an important role today. For this reason, we need optimizing embedded DSP compilers that can generate capable code with efficiency in terms of performance, power, area, and productivity in order to use embedded DSPs effectively. With exploiting the specific hardware feature of DSPs, the embedded DSP compilers can avoid designer to optimize applications on hand which will increase the time-to-market without lost performance. In this paper, we show that using the proposed post compilation framework, we can exploit hardware specific features of DSPs with runtime information to optimize the results of other compilers. In the simulation results, we demonstrate that the proposed framework can optimize the programs optimized by another compiler Blackfin GCC 3.4 and VDSP++ 4.5 with optimization level 3 and get additional 17.56% and 8.8% performance on average. We also can get additional 5.8% performance on average of the real multimedia program H.264 which is optimized by hand-turned DSP library.