Cyclic Queue Insertion for Performance Enhancement of a QFHD H.264/AVC Main Profile Decoder
碩士 === 國立清華大學 === 資訊工程學系 === 95 === We propose a cyclic-queue buffering scheme to reduce bubble cycles in the pipeline of a pure hardwired H.264/AVC main profile decoder. After analyzing hardware cost and throughput gain, a moderate number of memory blocks is inserted between stages. Under the same...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/33217386029563775298 |