| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 95 === Multimedia extensions are nearly ubiquitous in today’s general-purpose processors. These extensions consist primarily of a set of short vector instructions that operate on same opcode to a vector of operands. To exploit the SIMD capabilities of these architectures, it has prompted the needs for generating efficient simdized codes that SIMD architectures can benefit from.
This Thesis sets out to develop a vector SIMD compiler with techniques that target short vector instructions effectively and automatically. Operations on non-contiguous vector elements are not supported and they require explicit data realigning. Thus, one of the most common aspects of compilation is the effective management of memory alignment and coping with mixed data type.
We identify several new challenges arisen in simdizing multimedia applications, and provide some solutions to these challenges. Simdizing such computation efficiently is therefore an ambitious challenge for compiler designer. We implemented an automatic simdization framework that supports effective simdization in the presence of control flow, memory misalignment, and mixed length conversion.
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