Exploration of SoC Platform Architectures Using the System-Level Design Methodology

• Main Authors: Zhen-Lung Chen, 陳振隆
• Other Authors: 王勝德
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/77803948139535793804

碩士 === 國立臺灣大學 === 電機工程學研究所 === 95 === With the improvement of IC manufacturing technologies, hundred millions of transistors could be put into one chip, and this also leads the system chip design to a more and more complex situation. The design methodology on the system level helps system developers advance the abstraction level of design, validate and verify the design at early stage, collect and analyze data and improve system structures so as to reduce the development complexity of a system-on-chip. The systemC hardware description language and ConvergenSC, a development tool on the system level of CoWare Inc., are adopted in our work. In this thesis, the methodology of transaction-level modeling is used to design hardware components and build abstract models, and the ConvergenSC tool is used to build three transaction-level virtual prototypes of system-on-a-chip platforms. We can analyze the efficiency of each system platform through the simulated data, and evaluate the strength and weakness of system architectures.