| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 95 === Polysilicon thin film transistors (poly-Si TFTs) have been investigated for their extensive applications on memory devices, active matrix liquid crystal displays (AMLCDs) and digital cameras. It’s because the electron mobility of ploy-Si TFTs is about 100 times larger than that of amorphous TFTs However, conventional self-aligned polysilicon TFTs present several undesired effects in the electrical characteristics, including large off-state currents (leakage), kink effect and hot carrier instabilities. In order to improve the electrical properties of poly-Si TFTs, the heterostructure Poly-Si/SiC TFTs are employed.
In this thesis, heterostructure TFTs were studied by simulation. The conventional single source/drain poly-Si and poly-SiC TFTs are discussed first. Because the bandgap of SiC is larger than that of Si, poly-SiC TFTs show low leakage current and high threshold voltage. Next, the thickness of poly-Si and ploy-SiC is changed to study its influence to device characteristics. In addition, the channel doping concentration is also changed for reducing the threshold voltage.
Finally, TFTs mentioned above of various channel length and gate oxide thickness is investigated. From the results of simulation, it’s found that the leakage current of poly-Si TFTs is increased strictly and the leakage current of heterostructure TFTs is increased slightly when the channel length and gate oxide thickness is decreased.
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