Summary: | 碩士 === 國立臺灣科技大學 === 電機工程系 === 95 === This thesis presents the RF front-end for RFID passive-tag applications using TSMC 0.18um Mixed Signal/RF CMOS 1P6M process. The RF front-end consists of charge pump, regulator, modulator and demodulator; its size is 0.714 x 1.01 mm2. A signal with -14 dBm at 915 MHz is injected into the charge pump, the voltage can reach to 1.51V, and the ripple voltage is 0.14V. A signal with -6 dBm at 915 MHz is driven at the input, the voltage of the regulator can reach to 1.46V, and the ripple voltage is 0.06V. Referring the measured result, the proposed demodulator can successfully detect the signal with data rate, 15 Kbps. The modulator can response the signal with the power -36.7 dBm to the reader. Finally, we demonstrate the read range of the proposed passive-tag IC integrated with the standard dipole antenna is 1.2 meter.
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