Dispatching Designs in IC Fabrication Based on On-site Considerations

• Main Authors: chih-hsiang hsu, 許致祥
• Other Authors: 劉力
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/71796527700246498495

碩士 === 東海大學 === 數學系 === 95 === This research is the continuation of a series of studies about the on-site flow-control technique in IC fabrication. It is different from those designs developed by the traditional production planning and managing framework. It achieved three aspects. First, we improve the wafer-interval-smoothness -short-value flow-control technique by putting “local-interval-smoothness” and “procedure-point-smoothness” methods which produce better throughputs. Take the experimental process one as an example, the yearly throughput of the single-process operating system increases 0.74% by the former method and 1.49% by the latter over the previous technique. Second, we know by the data of different throughputs. At the same time we made an important discovery, that the common practice of “bottlenecks decide throughput” is debatable. It is “flow-control designs decide throughput”, not “bottlenecks decide throughput”. Third, we made an introduction to the simulation program and gave instructions as how to change some related program codes, when new ideas of dispatching rule present. This would save considerable time for the coming users.