Development and Implementation of Power Factor Corrector with Soft Switching

• Main Authors: Yen-Chang Lin, 林延璋
• Other Authors: Yen-Shin Lai
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/5r9wn4

碩士 === 國立臺北科技大學 === 電機工程系研究所 === 95 === The objective of this thesis is to design and implement a soft-switching AC/DC converter with Power Factor Correction. The implemented converter is a boost topology with zero voltage transition to reduce switching loss. The converter consists of MOSFET, inductor, capacitor and diode. Moreover, this thesis includes PFC-OFF control and auxiliary circuit which will significantly reduce the standby power consumption to meet the energy efficiency specifications under standby condition. The specifications of converter are as follows: universal input voltage: AC 85 ~ 264 V, 50~60 Hz, converter output: DC 400 V/800 W, auxiliary power: DC 5 V/3 A and 15 V, standby power (European and Japan Specifications): input power < 0.75 W @ 264 V/AC input. As shown by the experimental results, the main switch can achieve zero-voltage transition under universal input and wide load conditions. Moreover, the power factor can be higher than 99% under full load condition and universal input voltage range. And the power consumption under standby condition is less than 0.75 W which is less than the green power requirement.