Low Power-Bounce Current-Mode Low Dropout Voltage Regulator

• Main Authors: Chan-Min Pan, 潘財明
• Other Authors: Jiann-Jong Chen
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/bx6d9s

碩士 === 國立臺北科技大學 === 電子電腦與通訊產業研發碩士專班 === 95 === The current-mode LDO contains error amplifier, buffer stage and current feedback. The LDO circuit can produce a stable output voltage and the output voltage is smaller than input voltage. The open-loop gain of error amplifier is about 80 db, which allows the output voltage of error amplifier to be very accurate. The current-mode LDO can reduce power-bounce and ground bounce, which allows the improvement of inductance effect on the power and ground line. Adding the buffer stage and current feedback circuit between error amplifier and the output of the LDO can speed up transient response. The proposed current-mode low dropout voltage regulator has been fabricated in TSMC 0.35μm 2P4M CMOS process, the supplying voltage is 3V, the input current range is 185mA~350mA, the output voltage is 1.8V, and the max efficiency is 97.3%. The chip includes 1177 transistors and area is 0.783×0.875mm2.