Hardware / Software Real-Time Relocatable Task Scheduling and Placement in Dynamically Partial Reconfigurable Systems

• Main Authors: Chen-Chi Chiang, 姜成器
• Other Authors: Pao-Ann Hsiung
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/65670603806423343516

碩士 === 國立中正大學 === 資訊工程所 === 96 === Embedded systems always consist of software and hardware components. Tasks implemented as software programs running on microprocessor have the properties of high flexibility but poor performance. On the other hand, tasks implemented as hardware modules placed on FPGA have the characteristics of high performance along with low flexibility and high cost. As a tradeoff, reconfigurable systems are becoming a feasible solution to combine performance and flexibility, because they allow us to have software tasks running on a microprocessor along with hardware tasks running on an FPGA device. In such systems we can even design relocatable tasks, that is they can switch from hardware to software and vice versa. Using such an architecture allows us to design high performance real-time embedded systems. However, in such systems the management of all resources is very complex, thus we need an operating system that can manage both software and hardware tasks and resources. The jobs that an operating system for reconfigurable systems must perform include task partitioning, scheduling, task communication, and placement. In this Thesis, we discuss the scheduling and placement issues. To schedule a task in hardware or in software is an important decision, because an improper execution sequence may cause the real-time tasks to be unable to meet their timing constraints or cause more power consumptions. Placing a task in a proper location will lead to lesser fragmentation of the free space. This Thesis presents a scheduling and a placement algorithm for real-time relocatable tasks such that the tasks meet their real-time constraints and the fragmentation of reconfigurable resources is reduced. Furthermore, an STS scheduling algorithm is used to improve the usage of system resources. Finally, we use some randomly generated examples and a real example to prove the feasibility of our scheduler. Compare to the past work the hardware utilization ratio is improved by 0.5\% to 14.7\%.