| Summary: | 碩士 === 國立中正大學 === 資訊工程所 === 96 === When we execute video decoding software on ARM multimedia development physical platforms, their performances (execution cycles) are not as good as the execution cycles when they are realized in ARM Developer Suite (ADS) simulation. The thesis explores why there exists gaps between software tool simulation and ARM physical platforms. Furthermore, we analyze the major reasons to the above problem by proposing an ARM-Based SoC platform architecture for multimedia video coding and improve the performance of the video coding on ARM platforms.
By using SoC Designer, we construct a virtual platform to model a physical platform. The virtual platform consists of components like ARM CPU, Memory, Bus and so forth. The simulations accuracy of ADS is different from accuracy of our proposed virtual platform. ADS software achieves the simulation accuracy of 46%~62% execution cycles as compared to those on ARM platform when it executes video decoders. But the virtual platform achieves the simulation accuracy of 83%~104% execution cycles as compared to those on ARM platform when it executes video decoders. Therefore, the simulation accuracy of our proposed virtual platform exceeds it on ADS. Besides, the simulation accuracy of ADS is getting lower as Clock ratio (CPU/AHB) is getting higher. But this situation doesn’t exist on our proposed virtual platform constructed by SoC Designer. Then, we can use the profiling function of the proposed virtual platform to find out the bottleneck of video decoders realized in physical platforms for improvement. Moreover, we can use parameters provided by the proposed virtual platform to explore which configuration in architecture providing better performance when realizing video decoders.
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