Implementation of Channel Estimation Using FFT For DVB-T System
碩士 === 長庚大學 === 電機工程學研究所 === 96 === In this thesis, we implement the hardware of channel estimator for DVB-T system with FPGA. We refer to our published results of research for the algorithm of channel estimator. The hardware implementation contains FFT、Channel Estimation、Zero padding mode circuit....
Main Authors: | Feng-Ming Hsu, 許峰銘 |
---|---|
Other Authors: | Y. A. Kao |
Format: | Others |
Published: |
2008
|
Online Access: | http://ndltd.ncl.edu.tw/handle/51367206549860437924 |
Similar Items
-
OFDM comparison with FFT and DWT processing for DVB-T2 wireless channels
by: Hernan Paz Penagos
Published: (2018-12-01) -
Two Port Memory-based FFT Architecture for DVB-T
by: Yung-Ming Chang, et al.
Published: (2014) -
Implementation of Channel Estimation Methods for DVB-T System on PACDSP Platform
by: Kuo, Chien-Hao, et al.
Published: (2009) -
Channel Estimation Techniques for DVB-T Receiver
by: Fang-Hsu Lu, et al.
Published: (2009) -
An Efficient FFT Processor Using Pipelined Multi-radix architecture for DVB-T/H Systems
by: Yueh-Shu Li, et al.
Published: (2009)