Design of Multiple-Clock-Domain Circuits for Image Processing
碩士 === 長庚大學 === 電機工程學研究所 === 96 === The area of the chip and complexity improve day by day, make the chip have multiple-clock-domains, the mechanism of transmitting data among multiple-clock-domain is increasingly important. How to make the data transmitted stably and correctly in the system design...
Main Authors: | Chun Min Cheng, 鄭俊民 |
---|---|
Other Authors: | J. D. Lee |
Format: | Others |
Published: |
2008
|
Online Access: | http://ndltd.ncl.edu.tw/handle/61950203897112282818 |
Similar Items
-
The design of synchronization circuit for crossing the clock domain in multi clock system
by: Zhao Yang, et al.
Published: (2018-02-01) -
Multiple-Clock-Domain Design Methodology for AMBA Platform
by: Kun-Sheng Huang, et al.
Published: (2005) -
1.25 Gbps Clock and Data Recovery Circuit Design
by: Cheng Chao Kuo, et al.
Published: (2003) -
Design of variation-tolerant synchronizers for multiple clock and voltage domains
by: Alshaikh, Mohammed Saleh Abdullah
Published: (2014) -
Design of a FIFO for Data Transfer between Multiple Clock Domains
by: Jian Syun Huang, et al.
Published: (2008)