Design a Configuration for Multiple Hyper-Transport Links in AMD Multiprocessor Architectures

• Main Authors: Chien-Fu Chen, 陳建富
• Other Authors: Tsai Ming Hsieh
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/17460085809229582271

碩士 === 中原大學 === 資訊工程研究所 === 96 === AMD OPTERON processor in the system architecture, Two-way can support, the Four-way and Eight-way, Some in this framework, If a motherboard support two processors, But when users want to use one processor in the support two processors on the motherboard, This machine can not to opened in the state and power on fail, This also occurred in the same state of four processors and eight processors, The state of the users of such puzzles, Nor cost-effective. In this paper, I have proposed a Design a Configuration for Multiple Hyper-Transport Links in AMD Multiprocessor Architectures. We use the existing AMD AGESA processor code, Do processor Hyper-Transport structure changes, Now to the original AMD AGESA Hyper-Transport Link Table support group only a motherboard design, Take Two-way framework, When the Hyper-Transport processor architecture do not meet, BIOS boot will be the first of the original AMD AGESA Hyper-Transport Link Table find out initialization, If users only use one processor in the Two-way framework, Two-way because of this structure and the original kept in the BIOS HT Link Table inconsistency, Therefore, the failure to open the processor Hyper-Transport Link initialization, Therefore, we have proposed a Design a Configuration for Multiple Hyper-Transport Links in AMD Multiprocessor Architectures, To solve this problem, and this may increase the flexibility of the structure, the processor can also drop at the end of the cost. Experimental results show that the Design a Configuration for Multiple Hyper-Transport Links in AMD Multiprocessor Architectures can prove the processor architecture of two-way, the four-way and eight-way and reduce costs. Of the technique makes the user comfortable.