A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic
碩士 === 逢甲大學 === 電子工程所 === 96 === Domino logic design offers smaller area and higher speed than complementary CMOS design. Domino logic design has become a very popular technology used to design high-performance processors. There have been several studies conducted on dual phase operation dynamic cir...
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ndltd-TW-096FCU054280132015-11-27T04:04:43Z http://ndltd.ncl.edu.tw/handle/63824827301242642619 A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic 高速雙相動態電路設計自動化流程之實現 HSIANG-HUI HUANG 黃翔暉 碩士 逢甲大學 電子工程所 96 Domino logic design offers smaller area and higher speed than complementary CMOS design. Domino logic design has become a very popular technology used to design high-performance processors. There have been several studies conducted on dual phase operation dynamic circuit, but most have focused on theory without practical implementation in large circuits. In this thesis, we establish the cell based synthesis design flow of the high speed dual phase operation dynamic circuit, which includes skew tolerant, low-power and high-performance characteristics. In this work, there are three major contributions: First, we propose a high-performance dual phase circuit design technique. Second, the supported synthesizable design CAD flow has been established. The skew-tolerant problem is also considered in these CAD tools. Third, domino cell libraries with two noise-alleviation (charge sharing and crosstalk) capabilities are generated to support the cell-based synthesis CAD design tools. Finally, the results of this paper show validation of the proposed technique with real chip implementation. Ching-Hwa Cheng 鄭經華 2008 學位論文 ; thesis 94 zh-TW |
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碩士 === 逢甲大學 === 電子工程所 === 96 === Domino logic design offers smaller area and higher speed than complementary CMOS design. Domino logic design has become a very popular technology used to design high-performance processors. There have been several studies conducted on dual phase operation dynamic circuit, but most have focused on theory without practical implementation in large circuits. In this thesis, we establish the cell based synthesis design flow of the high speed dual phase operation dynamic circuit, which includes skew tolerant, low-power and high-performance characteristics. In this work, there are three major contributions: First, we propose a high-performance dual phase circuit design technique. Second, the supported synthesizable design CAD flow has been established. The skew-tolerant problem is also considered in these CAD tools. Third, domino cell libraries with two noise-alleviation (charge sharing and crosstalk) capabilities are generated to support the cell-based synthesis CAD design tools. Finally, the results of this paper show validation of the proposed technique with real chip implementation.
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Ching-Hwa Cheng |
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Ching-Hwa Cheng HSIANG-HUI HUANG 黃翔暉 |
author |
HSIANG-HUI HUANG 黃翔暉 |
spellingShingle |
HSIANG-HUI HUANG 黃翔暉 A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
author_sort |
HSIANG-HUI HUANG |
title |
A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
title_short |
A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
title_full |
A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
title_fullStr |
A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
title_full_unstemmed |
A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic |
title_sort |
fully synthesizable design flow for high-speed dual-phase dynamic logic |
publishDate |
2008 |
url |
http://ndltd.ncl.edu.tw/handle/63824827301242642619 |
work_keys_str_mv |
AT hsianghuihuang afullysynthesizabledesignflowforhighspeeddualphasedynamiclogic AT huángxiánghuī afullysynthesizabledesignflowforhighspeeddualphasedynamiclogic AT hsianghuihuang gāosùshuāngxiāngdòngtàidiànlùshèjìzìdònghuàliúchéngzhīshíxiàn AT huángxiánghuī gāosùshuāngxiāngdòngtàidiànlùshèjìzìdònghuàliúchéngzhīshíxiàn AT hsianghuihuang fullysynthesizabledesignflowforhighspeeddualphasedynamiclogic AT huángxiánghuī fullysynthesizabledesignflowforhighspeeddualphasedynamiclogic |
_version_ |
1718138448788848640 |