A Fully Synthesizable Design Flow for High-Speed Dual-Phase Dynamic Logic

• Main Authors: HSIANG-HUI HUANG, 黃翔暉
• Other Authors: Ching-Hwa Cheng
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/63824827301242642619

碩士 === 逢甲大學 === 電子工程所 === 96 === Domino logic design offers smaller area and higher speed than complementary CMOS design. Domino logic design has become a very popular technology used to design high-performance processors. There have been several studies conducted on dual phase operation dynamic circuit, but most have focused on theory without practical implementation in large circuits. In this thesis, we establish the cell based synthesis design flow of the high speed dual phase operation dynamic circuit, which includes skew tolerant, low-power and high-performance characteristics. In this work, there are three major contributions: First, we propose a high-performance dual phase circuit design technique. Second, the supported synthesizable design CAD flow has been established. The skew-tolerant problem is also considered in these CAD tools. Third, domino cell libraries with two noise-alleviation (charge sharing and crosstalk) capabilities are generated to support the cell-based synthesis CAD design tools. Finally, the results of this paper show validation of the proposed technique with real chip implementation.