Design and Implementation of the CMOS RF Front-end Amplifiers for WiMAX System Application

碩士 === 逢甲大學 === 通訊工程所 === 96 === In recent years, the mobile communication and wireless network demand increased quickly. The network and communication service will be replaced the wired network of the traditional type by the wireless network in the future. The original network structure has been un...

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Bibliographic Details
Main Authors: Yu-siang Chen, 陳郁翔
Other Authors: Man-Long Her
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/91263243367704010760
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Summary:碩士 === 逢甲大學 === 通訊工程所 === 96 === In recent years, the mobile communication and wireless network demand increased quickly. The network and communication service will be replaced the wired network of the traditional type by the wireless network in the future. The original network structure has been unable to meet its market demand, so a lot of new solutions were presented. The major method is worldwide interoperability for microwave access (WiMAX). WiMAX is a new wireless wideband technology; it has a 75 Mbps data rate to transmit information; its transmission coverage range is 50 Kilometers. This technique can offer wide bandwidth and high quality service. In this thesis, we will focus on the radio frequency Front-end power amplifier. In this thesis, we were used the TSMC standard 0.18 um RF CMOS process to design and implementation Front-end amplifiers. This CMOS process has the high integrated and low cost feature. But the maximum output power will limited by low operate voltage and high knee effect. Hence, we tried to design the CMOS Front-end amplifier which is suitable for WiMAX system. In the first circuit design, we designed a fully integrated CMOS power amplifier with center frequency 3.5 GHz. The parallel transistors technique was proposed to enhance the maximum output power. The measured maximum power gain is 19.8 dB, the IP1dB is -5 dBm, the the OP1dB is 15 dBm and the maximum output power is 16.7 dBm. In the second circuit design, we designed an integrated CMOS power amplifier with center frequency 3.5 GHz. In order to improve the matching flexible of first circuit design, we proposed the external matching network on the PCB board by the bonding wire to fine tune maximum output power. The measured maximum power gain is 18.8 dB, the IP1dB is -6 dBm, the OP1dB is 11.5 dBm and the maximum output power is 20.7 dBm. In the third circuit design, we proposed the design concepts of system on chip (SOC), we tried to integrated three sub circuits in a single CMOS chip, the power amplifier, the low noise amplifier and the single-pole double-through switch. In the transmitter mode, the measured maximum power gain is 15 dB, the IP1dB is -4 dBm, the OP1dB is 10 dBm and the maximum output power is 14.4 dBm. In the receiver mode, the measured maximum power gain is 1.6 dB, the IP1dB is -11 dBm, the OP1dB is -8 dBm and the maximum output power is 4.6 dBm.