Study on low loss transmission line and wideband low noise amplifier
碩士 === 國立中興大學 === 電機工程學系所 === 96 === This thesis includes two topics. The first topic studies on low loss CPW transmission line for millimeter wave application in 90 nm CMOS technology. The twice cross-tie metal patterns is proposed to decrease transmission line loss and maintain operation bandwidth...
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ndltd-TW-096NCHU54410502016-05-09T04:13:42Z http://ndltd.ncl.edu.tw/handle/98119049446505461249 Study on low loss transmission line and wideband low noise amplifier 低損耗傳輸線與寬頻低雜訊放大器之研究 Chan-Jung Hsu 許展榕 碩士 國立中興大學 電機工程學系所 96 This thesis includes two topics. The first topic studies on low loss CPW transmission line for millimeter wave application in 90 nm CMOS technology. The twice cross-tie metal patterns is proposed to decrease transmission line loss and maintain operation bandwidth using nano-meter CMOS technology. Three transmission lines are implemented in this experiment. The measurement results show that the location of cross-tie metal patterns in metal-1 and metal-2 films exhibits the low attenuation constant and maintains the operation bandwidth compared with conventional transmission line. Moreover, the modeling effort is paid to analyze the experiment result. The result shows the attenuation constants with the values of 268 dB/cm and 710dB/cm for proposed and traditional Coplanar Waveguide (CPW) lines. A huge improvement is achieved to apply the transmission line in millimeter-wave operation using CMOS technology. The second topic demonstrates the broadband CMOS amplifiers. A novel architecture is proposed to design broadband CMOS amplifiers in this thesis. The proposed architecture includes the two-stage cascade and shunt peaking techniques. Accordingly, the bandwidth-compensation is executed to achieve gain flatness, broadband, low noise, and low power performances. The low noise amplifier (LNA) was fabricated in TSMC 0.18-μm CMOS process. Measurement results show that the design circuit accomplishes the highest gain-bandwidth product, which has the value of 173 GHz, compared with reported works using a 0.18-μm CMOS technology. Moreover, an ultra-wide-band (UWB) low noise amplifier utilizing inductive feedback technique is proposed. The proposed UWB LNA was fabricated in CMOS 0.13-μm process. The implemented LNA presents a maximum power gain of 10 dB, and a good input matching of 50Ω over frequency band. An excellent noise figure (NF) of <5dB was obtained in the frequency range of 0.1–12 GHz, the amplifier with a power dissipation of 30 mW under a 2.5-V power supply. Heng-Ming Hsu 許�睇� 學位論文 ; thesis 104 zh-TW |
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碩士 === 國立中興大學 === 電機工程學系所 === 96 === This thesis includes two topics. The first topic studies on low loss CPW transmission line for millimeter wave application in 90 nm CMOS technology. The twice cross-tie metal patterns is proposed to decrease transmission line loss and maintain operation bandwidth using nano-meter CMOS technology. Three transmission lines are implemented in this experiment. The measurement results show that the location of cross-tie metal patterns in metal-1 and metal-2 films exhibits the low attenuation constant and maintains the operation bandwidth compared with conventional transmission line. Moreover, the modeling effort is paid to analyze the experiment result. The result shows the attenuation constants with the values of 268 dB/cm and 710dB/cm for proposed and traditional Coplanar Waveguide (CPW) lines. A huge improvement is achieved to apply the transmission line in millimeter-wave operation using CMOS technology.
The second topic demonstrates the broadband CMOS amplifiers. A novel architecture is proposed to design broadband CMOS amplifiers in this thesis. The proposed architecture includes the two-stage cascade and shunt peaking techniques. Accordingly, the bandwidth-compensation is executed to achieve gain flatness, broadband, low noise, and low power performances. The low noise amplifier (LNA) was fabricated in TSMC 0.18-μm CMOS process. Measurement results show that the design circuit accomplishes the highest gain-bandwidth product, which has the value of 173 GHz, compared with reported works using a 0.18-μm CMOS technology. Moreover, an ultra-wide-band (UWB) low noise amplifier utilizing inductive feedback technique is proposed. The proposed UWB LNA was fabricated in CMOS 0.13-μm process. The implemented LNA presents a maximum power gain of 10 dB, and a good input matching of 50Ω over frequency band. An excellent noise figure (NF) of <5dB was obtained in the frequency range of 0.1–12 GHz, the amplifier with a power dissipation of 30 mW under a 2.5-V power supply.
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author2 |
Heng-Ming Hsu |
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Heng-Ming Hsu Chan-Jung Hsu 許展榕 |
author |
Chan-Jung Hsu 許展榕 |
spellingShingle |
Chan-Jung Hsu 許展榕 Study on low loss transmission line and wideband low noise amplifier |
author_sort |
Chan-Jung Hsu |
title |
Study on low loss transmission line and wideband low noise amplifier |
title_short |
Study on low loss transmission line and wideband low noise amplifier |
title_full |
Study on low loss transmission line and wideband low noise amplifier |
title_fullStr |
Study on low loss transmission line and wideband low noise amplifier |
title_full_unstemmed |
Study on low loss transmission line and wideband low noise amplifier |
title_sort |
study on low loss transmission line and wideband low noise amplifier |
url |
http://ndltd.ncl.edu.tw/handle/98119049446505461249 |
work_keys_str_mv |
AT chanjunghsu studyonlowlosstransmissionlineandwidebandlownoiseamplifier AT xǔzhǎnróng studyonlowlosstransmissionlineandwidebandlownoiseamplifier AT chanjunghsu dīsǔnhàochuánshūxiànyǔkuānpíndīzáxùnfàngdàqìzhīyánjiū AT xǔzhǎnróng dīsǔnhàochuánshūxiànyǔkuānpíndīzáxùnfàngdàqìzhīyánjiū |
_version_ |
1718262952544436224 |