A 1-V 13-μW on-Chip Successive Approximation Analog-to-Digital Converter for Bio-Sensing Applications

• Main Authors: Ching-wei Hsu, 徐菁偉
• Other Authors: Bin-Da Liu
• Format: Others
• Language: en_US
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/21011509980048115751

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === This thesis describes a low supply voltage and low-power integrated analog-to-digital converter (ADC) for implantable bio-medical sensor applications. A 1-V 10-bit successive approximation ADC is proposed. The fully differential architecture can suppress the noise effectively and allow a rail-to-rail input voltage range. The settling time of the preamplifier of the comparator becomes nearly two times by using a self-timed bit-cycling technique. In addition, the component will shut down when the conversion is finished. Therefore, the power consumption can be reduced. This successive approximation ADC with a 1-V supply voltage has been design in 0.18-μm CMOS process without low threshold MOS devices. The SNDR is 61.73 dB with the input frequency of 20.04 kHz and sample frequency of 200 kHz. The INL and DNL are between ±0.3LSB, and total power consumption without biasing circuit is 13-μW. FOM of the pre-layout simulation achieves 0.067 (pJ/conv.) without accounting biasing circuit.