Real-time Reconfigurable Cache for Low-Power Embedded Systems
碩士 === 國立暨南國際大學 === 資訊工程學系 === 96 === Modern embedded systems execute a small set of applications or even a single one repeatedly. Specializing cache configurations to a particular application is well-known to have great benefits on performance and power. To reduce the searching for optimal cache co...
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Format: | Others |
Language: | en_US |
Published: |
2007
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Online Access: | http://ndltd.ncl.edu.tw/handle/39182178624040456726 |
Summary: | 碩士 === 國立暨南國際大學 === 資訊工程學系 === 96 === Modern embedded systems execute a small set of applications or even a single one repeatedly. Specializing cache configurations to a particular application is well-known to have great benefits on performance and power. To reduce the searching for optimal cache configuration, a most-case optimal cache configuration searching algorithm for the entire execution of an application was proposed by Lin et al. in 2006 which greatly reduces the time and power in searching. However, the fact that the behavior of an application varies from phase to phase has been shown in recent years. Tuning cache configuration to fit a target application in different phases gives a further improvement in power consumption. This work presents a mechanism which determines the optimal configurations in different phases during an execution process. By dividing an execution process into small time intervals and applying corresponding local optimal cache configuration for each interval on L1 instruction cache, this work shows that on average 91.6% energy saving is obtained by comparing with average energy consumption of all four-way set-associative caches in search space. On average 5.29% power reduction is achieved by comparing with energy consumption of benchmarks with their respective global optimal cache configurations.
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