The Design and Implementation of WiMAX Feed-forward Power Amplifiers, High Efficiency Class F Power Amplifiers and Voltage Controlled Oscillators

碩士 === 國立中央大學 === 電機工程研究所 === 96 === This thesis describes several radio frequency circuit designs for WiMAX applications. They are implemented in TSMC 0.35 ?m SiGe BiCMOS and 0.18 ?m CMOS technologies, respectively. The implemented circuits include two Feed-forward power amplifiers, two Class F pow...

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Bibliographic Details
Main Authors: Jhih-Hong Chen, 陳致宏
Other Authors: Hwann-Kaeo Chiou
Format: Others
Language:zh-TW
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/44234459525185985777
Description
Summary:碩士 === 國立中央大學 === 電機工程研究所 === 96 === This thesis describes several radio frequency circuit designs for WiMAX applications. They are implemented in TSMC 0.35 ?m SiGe BiCMOS and 0.18 ?m CMOS technologies, respectively. The implemented circuits include two Feed-forward power amplifiers, two Class F power amplifiers, a quadrature voltage controlled oscillator (QVCO), and a Colpitts VCO. Two 2.6 GHz Feed-forward and two Class F power amplifiers are realized in the two-step transmitter architecture for mobile WiMAX system requirements.The QVCO and Colpitts VCO are realized in super-heterodyne architecture with image rejection mixer, their operating frequencies are 3220 ~ 3300 MHz and 6440 ~ 6600 MHz, respectively. The following sections will summarize the practical measured results which will be thoroughly presented in following chapters. Chapter 2 introduces the designs of sub-circuits of radio frequency transmitter, including two feed-forward power amplifiers and two Class F power amplifiers. These power amplifiers are implemented in TSMC 0.35 ?m SiGe BiCMOS and 0.18 ?m CMOS technologies, respectively. The feed-forward power amplifier implemented in 0.35 ?m SiGe BiCMOS technology provides a power gain of 12.4 dB with input return loss better than 10 dB, output return loss of 9.3 dB and, an output P1dB of 20.3 dBm, an output IP3 of 33 dBm, a PAE@ P1dB of 19.2 %. The CMOS feed-forward power amplifier provides a power gain of 12.2 dB with input return loss about 4.7 dB, an output return loss of 10.3 dB, an output P1dB of 22.1 dBm, an output IP3 of 33.2 dBm, a PAE@ P1dB of 26.6 %. The CMOS Class F power amplifier implemented provides a power gain of 13.1 dB with input return loss about 9 dB, an output return loss of 15.3dB, an output P1dB of 20.2 dBm, an output IP3 of 25.4 dBm, a PAE@ P1dB of 24.4 %. The SiGe Class F power amplifier provides a power gain 18.3 dB with input return loss better than 15 dB, an output return loss of about 6.6 dB, an output P1dB of 20.6 dBm, an output IP3 of 30.8 dBm, a PAE@ P1dB of 25.8 %. Chapter 3 introduces the designs of VCOs, including QVCO for 3220 ~ 3300 MHz band, and Colpitts VCO for 6440 ~ 6600 MHz band. The QVCO achieves a tuning range of 214 MHz, an output power of -9 ~ -5 dBm, The phase noise at 1 MHz offset carrier frequency is -110.875 dBc/Hz under a power consumption of the VCO core of 9.94 mW. The Colpitts VCO achieves a tuning range of 354 MHz, an output power of -11.7 ~ -11 dBm, The phase noise at 1MHz offset carrier frequency is -122 dBc/Hz under a power consumption of the VCO core of 19.1mW.