The Characterization of the Vertical Sidewall MOSFETs with Smart Body-tie, Buried Block Layer, and Novel Embedded Gate
碩士 === 國立中山大學 === 電機工程學系研究所 === 96 === In this thesis, according to the development of the vertical MOSFETs, we propose several MOSFETs that possess vertical channels, double gates, and buried oxide to solve the defects of the applications in switch devices, CMOS technique, and power devices. The ve...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/s4hyez |