A ROM-less DDFS Using A Parabolic Polynomial Interpoltion Method with An Offset Adjustment and Fabrication of Silcon-based OEIC Comprising Photodetector and Transimpedance Amplifier

碩士 === 國立中山大學 === 通訊工程研究所 === 96 === This thesis includes two topics. The first topic is a ROM-less DDFS (Direct Digital Frequency Synthesizer) using a parabolic polynomial in-terpolation method with an offset adjustment. The second one is the de-sign and fabrication of a silicon-based OEIC(optoelec...

Full description

Bibliographic Details
Main Authors: Chia-Chuan Lee, 李嘉川
Other Authors: Chua-Chin Wang
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/28635402674789697840
Description
Summary:碩士 === 國立中山大學 === 通訊工程研究所 === 96 === This thesis includes two topics. The first topic is a ROM-less DDFS (Direct Digital Frequency Synthesizer) using a parabolic polynomial in-terpolation method with an offset adjustment. The second one is the de-sign and fabrication of a silicon-based OEIC(optoelectronic integrated circuit) comprising photodetectors and transimpedance amplifiers. The ROM-less DDFS employs a parabolic polynomial interpola?tion method with an offset adjustment, where an initial phase offset is added into parabolic polynomials. Besides, the pipelining architecture is adopted to improve the speed of the proposed DDFS. The OEIC uses the hybrid integration technique to integrate the III-V optoelectronic devices (photodetector) and CMOS integrated circuits (transimpedance amplifier) onto the same substrate (silicon substrate) by the wafer bounding technique. With the realization of the hybrid in-tegration, the bandwidth degeneration resulted from the traditional wire bounding can be avoided.